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@skokvermon
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replace XSIM ifdef by XILINX_SIMULATOR as described in https://docs.xilinx.com/r/en-US/ug900-vivado-logic-simulation/Predefined-Macros
depends on pulp-platform/common_cells#139

Some more benchs are working

However there are segfaults on a lot of them.

@skokvermon skokvermon mentioned this pull request Sep 27, 2022
@thommythomaso
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We have internally discussed this matter. We can change XSIM to XILINX_SIMULATOR and guard/implement alternatives to make the TBs work in xsim if:

  • the changes happening globally and in the dependencies first, e.g., change XSIM to XILINX_SIMULATOR in common_cells first
  • the testbenches (or most of them) do run
  • the target is for sure not used in fusesoc for a different purpose (as XSIMwas introduced by olofk)
  • the code of the testbench will not look too fragmented due to too many ifdefs

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2 participants