USTC SSE practice
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FPGA-Image-Processing-2
FPGA-Image-Processing-2 PublicWe have implemented a hardware-accelerated image filtering system using a ZedBoard Zynq-7000. It supports five image filtering namely- Box Blur, Edge Detection, Unsharp Masking, High Pass Filter an…
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USTC-SSE-practice/FPGA-Image-Processing-1’s past year of commit activity - FPGA-Image-Processing-2 Public
We have implemented a hardware-accelerated image filtering system using a ZedBoard Zynq-7000. It supports five image filtering namely- Box Blur, Edge Detection, Unsharp Masking, High Pass Filter and Low Pass Filter.
USTC-SSE-practice/FPGA-Image-Processing-2’s past year of commit activity
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