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RAKSHITHA R NAYAK edited this page Mar 21, 2024 · 14 revisions

Block Diagram:

Copy of riscv_architecture

//explain

Fetching Instruction

explain about pc and Pc adder and instruction memory - create 3 heading for each topic

Addressing Register File

explain about register file

Passing Operands to ALU

jhgh

Datapath and Control Unit

RISC-V consists of defining the following instruction formats: R-type, I-type, S-Type, B-Type, U-type, and J-type. R-type instructions operate on three registers

Data Path for R type Instruction:

  • R-type instructions use three registers as operands: two as sources, and one as a destination
  • The 32-bit instruction has six fields: op, rs1, rs2, rd, funct3, and funct7.
  • Each field is five or seven bits, as indicated. All R-type instructions have an opcode of 33.
  • R-type instructions can handle add, sub, and, or and slt.
  • All of these instructions read two registers from the register file, perform some ALU operation on them, and write the result back to a third register in the register file.

Instruction Format for some of the R-type instructions is shown below:

RTyPE_inst drawio (1)

Ex: ADD X8,X12,X11

hexa format:

   32'h00B60933;   //    0000_0000_1011_0110_0111_0100_0011_0011

addinst drawio

Block Diagram of Main decoder and ALU decoder

The control unit computes the control signals based on the opcode and funct fields of the instruction, Instr[31:25], Instr[14:12] and Instr[6:0].

decoder drawio

All R-type instructions use the same main decoder values; they differ only in the ALU decoder output

alurtpecontrol drawio

    assign RegWrite = (Op == 7'b0000011 | Op == 7'b0110011) ? 1'b1 :
                                                              1'b0 ;
    assign ImmSrc = (Op == 7'b0100011) ? 2'b01 : 
                    (Op == 7'b1100011) ? 2'b10 :    
                                         2'b00 ;
    assign ALUSrc = (Op == 7'b0000011 | Op == 7'b0100011) ? 1'b1 :
                                                            1'b0 ;
    assign MemWrite = (Op == 7'b0100011) ? 1'b1 :
                                           1'b0 ;
    assign ResultSrc = (Op == 7'b0000011) ? 1'b1 :
                                            1'b0 ;
    assign Branch = (Op == 7'b1100011) ? 1'b1 :
                                         1'b0 ;
    assign ALUOp = (Op == 7'b0110011) ? 2'b10 :
                   (Op == 7'b1100011) ? 2'b01 :
                                        2'b00 ;

The main decoder computes most of the outputs from the opcode. It also determines a 2-bit ALUOp signal.When ALUOp is 00 or 01, the ALU should add or subtract, respectively. When ALUOp is 10, the decoder examines the function fields and operand bit to determine the ALUControl. The control signals for each instruction were described as we built the datapath.

aludecoder drawio

assign ALUControl = (ALUOp == 2'b00) ? 3'b000 :
                        (ALUOp == 2'b01) ? 3'b001 :
                        ((ALUOp == 2'b10) & (funct3 == 3'b000) & ({op[5],funct7[5]} == 2'b11)) ? 3'b001 : 
                        ((ALUOp == 2'b10) & (funct3 == 3'b000) & ({op[5],funct7[5]} != 2'b11)) ? 3'b000 : 
                        ((ALUOp == 2'b10) & (funct3 == 3'b010)) ? 3'b101 : 
                        ((ALUOp == 2'b10) & (funct3 == 3'b110)) ? 3'b011 : 
                        ((ALUOp == 2'b10) & (funct3 == 3'b111)) ? 3'b010 : 
      					((ALUOp == 2'b10) & (funct3 == 3'b100)) ? 3'b111 : 
                                                                  3'b000 ;
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