MPAE-6903: fixed info in metadata file

Author: CristianSabiuta

.main-meta/main.json

@@ -5,7 +5,7 @@
         "metaDataVersion": "1.1.0",
         "name": "com.microchip.mcu8.mplabx.project.pic18f47q10-cnano-clc-logic-bare",
         "version": "1.0.4",
-        "displayName": "Getting started with the CLC on PIC18 -> Using Basic Logic Gates",
+        "displayName": "Implementing Basic Logic Gates using CLC",
         "projectName": "pic18f47q10-cnano-clc-logic-bare",
         "shortDescription": "In this demo, the internal timers and PWMs are used to generate internal signals that are then connected to CLCs to implement basic logic gates. Three use cases are implemented : AND, OR and XOR.",
         "ide": {
@@ -41,19 +41,10 @@
             "Peripherals",
             [
                "Peripherals", "CLC"
-            ],
-            [
-               "Peripherals", "TIMER", "TMR2"
-            ],
-            [
-               "Peripherals", "PPS"
-            ],
-            [
-               "Peripherals", "PWM"
-            ]           			
+            ]          			
         ],
         "peripherals": [
-            "CLC", "TIMER", "TMR2", "PPS", "PWM"
+            "CLC"
         ],
         "keywords": [
             "Logic Function",